Overview
802.11g PHY IP Core is a synthesizable HDL implementation of IEEE
Standard 802.11g 2003 Edition in VHDL. The IEEE 802.11g specification
specifies the Physical Layer Entity for a further higher data rate
extension in the 2.4 GHz ISM band which builds on the 802.11b standard
and uses Orthogonal Frequency Division Multiplexing (OFDM) system
similar to 802.11a standard to achieve higher data rates.
The standard provides full backward compatibility with the 802.11b
standard. It supports the 802.11b specified data rates of 1, 2, 5.5
and 11 Mbps and adds further data rates of 6, 9, 12, 18, 24, 36, 48
and 54 Mbps using OFDM modulation.
Technical Specifications
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Fully
compliant to IEEE 802.11g Standard 2003 .
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DSSS,
CCK and OFDM based technology |
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Supports all data rates and modulation schemes: 1, 2, 5.5, 11, 6,
9, 12, 18, 24, 36,48 and 54 Mbps (DSSS/CCK/BPSK/QPSK/16-QAM/64-QAM)
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Guard
against data loss by FEC implementation with rate 1/2, 2/3,3/4 .
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Optimized Hard Logic Viterbi Decoder with puncturing of
1/2,2/3,3/4. |
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Supports Channel Estimation and Time domain and Frequency domain
equalization. |
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Supports both Long and Short Preamble |
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Timing
synchronization - packet detector. |
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Low
gate count, fully synthesizable, target independent code.
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Licensing
For additional information and licensing of the IP core please
Fill out this form |
